In this installation about the SIEVE IR, we’re going to talk about speeding up a proof system without changing the underlying zero-knowledge mathemagic.
When we time a ZK backend using the IR we inadvertently time two distinct components — the backend itself and the time it takes to ingest a circuit.
The first component, the backend, is fairly well understood and many groups are working on optimizing this — faster math and less communication.
The second component is the topic of today’s post; it’s the time spent reading a gate and loading its operands before it can be processed in ZK.
In our previous post we took a first look at the SIEVE IR, presenting it as impartially as possible.
Today we will take a more "opinionated" or normative look at the IR.
On the one hand, we are very proud of this accomplishment — (to our knowledge) the first widely implemented circuit representation for ZK.
However, we’d also like to acknowledge that the IR has its flaws and highlight where we think there is room for improvement.
Recently the DARPA SIEVE Program released a 1.0.1 version of its primary program-wide deliverable, the SIEVE Intermediate Representation (IR).
As one of the primary developers of the IR, team Wizkit will write a series of posts about the IR, what it got right, what it got wrong, and what we’d like to see in upcoming versions.
But today we will start the series with this post as more of an impartial introduction to the SIEVE IR.
It is our hope that this will ease you into using the SIEVE IR in your own work, and (most importantly) enable you to read further posts in this series.